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  lt1938 1 1938f 25v, 2.2a, 2.8mhz step-down switching regulator the lt ? 1938 is an adjustable frequency (300khz to 2.8mhz) monolithic buck switching regulator that accepts input voltages up to 25v. a high ef? ciency 0.18 switch is included on the die along with a boost schottky diode and the necessary oscillator, control and logic circuitry. current mode topology is used for fast transient response and good loop stability. the lt1938s high operating fre- quency allows the use of small, low cost inductors and ceramic capacitors resulting in low output ripple while keeping total solution size to a minimum. the low current shutdown mode reduces input supply current to less than 1a while a resistor and capacitor on the run/ss pin provide a controlled output voltage ramp (soft-start). a power good ? ag signals when v out reaches 90% of the programmed output voltage. the lt1938 is available in a 3mm 3mm dfn package with exposed pad for low thermal resistance. automotive battery regulation power for portable products distributed supply regulation industrial supplies wall transformer regulation wide input voltage range: 3.6v to 25v 2.2a maximum output current adjustable switching frequency: 300khz to 2.8mhz low shutdown current: i q < 1a integrated boost diode power good flag saturating switch design: 0.18 on-resistance 1.265v feedback reference voltage output voltage: 1.265v to 20v soft-start capability small 10-pin thermally enhanced (3mm 3mm) dfn package 3.3v step-down converter ef? ciency (v out = 3.3v) features description applications typical application sw bias fb v c pg rt v in bd v in 4.5v to 25v v out 3.3v 2.2a 4.7 f 0.47 f 680pf 22 f 200k 16.2k 60.4k 4.7 h 324k gnd off on lt1938 1938 ta01 run/ss boost , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. load current (a) 0 efficiency (%) 70 75 80 85 90 1.6 1938 g02 65 60 55 50 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.8 2.2 2.0 v in = 12v v in = 7v v in = 24v l: nec plc-0745-4r7 f = 800khz
lt1938 2 1938f electrical characteristics v in , run/ss voltage .................................................25v boost pin voltage ...................................................50v boost pin above sw pin .........................................25v fb, rt, v c voltage .......................................................5v bias, pg, bd voltage ................................................25v operating junction temperature range (note 2) lt1938e ............................................. ?40c to 125c lt1938i ............................................. ?40c to 125c storage temperature range ................... ?65c to 150c parameter conditions min typ max units minimum input voltage  33.6 v quiescent current from v in v run/ss = 0.2v 0.01 0.5 a v bias = 3v, not switching  0.4 0.8 ma v bias = 0, not switching 1.2 2.0 ma quiescent current from bias v run/ss = 0.2v 0.01 0.5 a v bias = 3v, not switching  0.85 1.5 ma v bias = 0, not switching 00.1 ma minimum bias v oltage 2.7 3 v feedback voltage  1.25 1.24 1.265 1.265 1.28 1.29 v v fb pin bias current (note 3)  30 100 na fb voltage line regulation 4v < v in < 25v 0.002 0.02 %/v the  denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 10v, v run/ss = 10v, v boost = 15v, v bias = 3.3v unless otherwise noted. (note 2) absolute maximum ratings (note 1) pin configuration top view dd package 10-lead (3mm ) =? = ? = () ( ) ( )
lt1938 3 1938f parameter conditions min typ max units error amp g m 330 mho error amp gain 1000 v c source current 75 a v c sink current 100 a v c pin to switch current gain 3.5 a/v v c clamp voltage 2v switching frequency r t = 8.66k r t = 29.4k r t = 187k 2.7 1.25 250 3.0 1.4 300 3.3 1.55 350 mhz mhz khz minimum switch off-time 100 150 ns switch current limit duty cycle = 5% 3.1 3.6 4.0 a switch v cesat i sw = 2a 360 mv boost schottky reverse leakage v sw = 10v, v bias = 0v 0.02 2 a minimum boost voltage (note 4) 1.6 2.1 v boost pin current i sw = 1a 18 30 ma run/ss pin current v run/ss = 2.5v 5 10 a run/ss input voltage high 2.5 v run/ss input voltage low 0.2 v pg threshold offset from feedback voltage v fb rising 100 mv pg hysteresis 10 mv pg leakage v pg = 5v 0.1 1 a pg sink current v pg = 0.4v 100 300 a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt1938e is guaranteed to meet performance speci? cations from 0c to 125c. speci? cations over the C40c to 125c operating temperature range are assured by design, characterization and correlation with statistical process controls. the lt1938i speci? cations are guaranteed over the C40c to 125c temperature range. note 3: bias current measured in regulation. bias current ? ows into the fb pin. note 4: this is the minimum voltage across the boost capacitor needed to guarantee full saturation of the switch. the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 10v, v run/ss = 10v v boost = 15v, v bias = 3.3v unless otherwise noted. (note 2) electrical characteristics
lt1938 4 1938f ef? ciency (v out = 5.0v) ef? ciency (v out = 3.3v) maximum load current switch voltage drop boost pin current switch current limit maximum load current switch current limit ef? ciency load current (a) 0 efficiency (%) 80 90 100 1.6 1938 g01 70 60 50 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.8 2.2 2.0 v in = 12v v in = 24v l: nec plc-0745-4r7 f = 800khz load current (a) 0 efficiency (%) 70 75 80 85 90 1.6 1938 g02 65 60 55 50 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.8 2.2 2.0 v in = 12v v in = 7v v in = 24v l: nec plc-0745-4r7 f = 800khz switching frequency (mhz) 0 efficiency (%) 85 1.5 1938 g03 70 60 0.5 1 2 55 50 90 80 75 65 2.5 3 v in = 12v v in = 24v v out = 3.3v l = 10 h load = 1a input voltage (v) 5 load current (a) 15 1938 g04 2.5 10 20 1.5 1.0 4.0 3.5 3.0 2.0 25 typical minimum v out = 3.3v t a = 25 c l = 4.7 h f = 800khz input voltage (v) 5 load current (a) 15 1938 g05 2.5 10 20 1.5 1.0 4.0 3.5 3.0 2.0 25 typical minimum v out = 5v t a = 25 c l = 4.7 h f = 800khz duty cycle (%) 0 switch current limit (a) 40 1938 g06 2.5 20 60 1.5 1.0 4.0 3.5 3.0 2.0 80 100 temperature ( c) ?50 switch current limit (a) 2.0 2.5 3.0 125 1938 g07 1.5 1.0 0 0 ?25 50 25 100 75 0.5 4.5 4.0 duty cycle = 10 % duty cycle = 90 % switch current (ma) 0 400 500 700 1500 2500 1938 g08 300 200 500 1000 2000 3000 3500 100 0 600 voltage drop (mv) switch current (ma) 0 0 boost pin current (ma) 10 30 40 50 2000 90 1938 g09 20 1000 500 2500 3000 1500 3500 60 70 80 (t a = 25c unless otherwise noted) typical performance characteristics
lt1938 5 1938f feedback voltage switching frequency frequency foldback minimum switch on-time soft-start run/ss pin current boost diode error amp output current minimum input voltage temperature ( c) ?50 feedback voltage (v) 1.270 1.280 125 1938 g10 1.260 1.250 0 50 100 ?25 25 75 1.290 1.265 1.275 1.255 1.285 temperature ( c) ?50 frequency (mhz) 1.00 1.10 125 1938 g11 0.90 0.80 0 50 100 ?25 25 75 1.20 r t = 45.3k 0.95 1.05 0.85 1.15 fb pin voltage (mv) 0 switching frequency (khz) 800 1000 1200 600 1000 1938 g12 600 400 200 400 800 1200 1400 200 0 r t = 45.3k temperature ( c) ?50 minimum switch on-time (ns) 80 100 120 25 1938 g13 60 40 ?25 0 50 75 100 125 20 0 140 run/ss pin voltage (v) 0 switch current limit (a) 3.5 1.5 1938 g14 2.0 1.0 0.5 1 2 0.5 0 4.0 3.0 2.5 1.5 2.5 3 3.5 run/ss pin voltage (v) 0 run/ss pin current ( a) 8 10 12 15 1938 g15 6 4 510 20 25 2 0 boost diode current (a) 0 boost diode v f (v) 0.8 1.0 1.2 2.0 1938 g16 0.6 0.4 0 0.5 1.0 1.5 0.2 1.6 1.4 fb pin voltage (v) 1.065 ?80 v c pin current ( a) ?60 ?20 0 20 1 .265 1.465 100 1938 g17 ?40 1.165 1.365 40 60 80 load current (a) 0.001 input voltage (v) 3.0 3.5 10 1938 g18 2.5 2.0 0.01 0.1 1 4.5 4.0 v out = 3.3v t a = 25 c l = 4.7 h f = 800khz typical performance characteristics (t a = 25c unless otherwise noted)
lt1938 6 1938f v c voltages minimum input voltage power good threshold switching waveforms (discontinuous operation) switching waveforms (continuous operation) load current (a) 0.001 input voltage (v) 5.0 5.5 10 1938 g19 4.5 4.0 0.01 0.1 1 6.5 6.0 v out = 5v t a = 25 c l = 4.7 h f = 800khz temperature ( c) ?50 threshold voltage (v) 1.50 2.00 2.50 25 75 125 1938 g20 1.00 0.50 0 ?25 0 50 100 current limit clamp switching threshold temperature ( c) ?50 threshold voltage (v) 1.160 1.180 1.200 25 75 125 1938 g21 1.140 1.120 1.100 ?25 0 50 100 pg rising i l 0.5a/div v sw 5v/div v out 10mv/div 1938 g22 1 s/div v in = 12v, front page application i load = 140ma i l 0.5a/div v sw 5v/div v out 10mv/div 1938 g23 1 s/div v in = 12v, front page application i load = 1a typical performance characteristics (t a = 25c unless otherwise noted)
lt1938 7 1938f bd (pin 1): this pin connects to the anode of the boost schottky diode. boost (pin 2): this pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar npn power switch. sw (pin 3): the sw pin is the output of the internal power switch. connect this pin to the inductor, catch diode and boost capacitor. v in (pin 4): the v in pin supplies current to the lt1938s internal regulator and to the internal power switch. this pin must be locally bypassed. run/ss (pin 5): the run/ss pin is used to put the lt1938 in shutdown mode. tie to ground to shut down the lt1938. tie to 2.3v or more for normal operation. if the shutdown feature is not used, tie this pin to the v in pin. run/ss also provides a soft-start function; see the applications information section. pg (pin 6): the pg pin is the open collector output of an internal comparator. pg remains low until the fb pin is within 10% of the ? nal regulation voltage. pg output is valid when v in is above 3.5v and run/ss is high. bias (pin 7): the bias pin supplies the current to the lt1938s internal regulator. tie this pin to the lowest available voltage source above 3v (typically v out ). this architecture increases ef? ciency especially when the input voltage is much higher than the output. fb (pin 8): the lt1938 regulates the fb pin to 1.265v. connect the feedback resistor divider tap to this pin. v c (pin 9): the v c pin is the output of the internal error ampli? er. the voltage on this pin controls the peak switch current. tie an rc network from this pin to ground to compensate the control loop. rt (pin 10): oscillator resistor input. connecting a resistor to ground from this pin sets the switching frequency. exposed pad (pin 11): ground. the exposed pad must be soldered to the pcb. pin functions
lt1938 8 1938f block diagram + ? + ? + ? oscillator 300khz?2.8mhz v c clamp soft-start slope comp internal 1.265v ref r v in v in bias run/ss boost sw switch latch v c v out c2 c3 c f l1 d1 c c r c bd rt r2 gnd error amp r1 fb r t c1 pg 1.12v s q 1938 bd 4 7 5 10 6 1 2 3 9 11 8
lt1938 9 1938f the lt1938 is a constant frequency, current mode step- down regulator. an oscillator, with frequency set by rt, enables an rs ? ip-? op, turning on the internal power switch. an ampli? er and comparator monitor the current ? owing between the v in and sw pins, turning the switch off when this current reaches a level determined by the voltage at v c . an error ampli? er measures the output voltage through an external resistor divider tied to the fb pin and servos the v c pin. if the error ampli? ers output increases, more current is delivered to the output; if it decreases, less current is delivered. an active clamp on the v c pin provides current limit. the v c pin is also clamped to the voltage on the run/ss pin; soft-start is implemented by generating a voltage ramp at the run/ss pin using an external resistor and capacitor. an internal regulator provides power to the control cir- cuitry. the bias regulator normally draws power from the v in pin, but if the bias pin is connected to an external voltage higher than 3v bias power will be drawn from the external source (typically the regulated output voltage). this improves ef? ciency. the run/ss pin is used to place the lt1938 in shutdown, disconnecting the output and reducing the input current to less than 1a. the switch driver operates from either the input or from the boost pin. an external capacitor and diode are used to generate a voltage at the boost pin that is higher than the input supply. this allows the driver to fully saturate the internal bipolar npn power switch for ef? cient operation. the oscillator reduces the lt1938s operating frequency when the voltage at the fb pin is low. this frequency foldback helps to control the output current during startup and overload. the lt1938 contains a power good comparator which trips when the fb pin is at 90% of its regulated value. the pg output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the pg pin high. power good is valid when the lt1938 is enabled and v in is above 3.6v. operation
lt1938 10 1938f fb resistor network the output voltage is programmed with a resistor divider between the output and the fb pin. choose the 1% resis- tors according to: rr v out 12 1 265 1 =       . ? reference designators refer to the block diagram. setting the switching frequency the lt1938 uses a constant frequency pwm architecture that can be programmed to switch from 300khz to 2.8mhz by using a resistor tied from the rt pin to ground. a table showing the necessary r t value for a desired switching frequency is in figure 1. switching frequency (mhz) r t value (k ) 0.2 0.3 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 267 187 133 84.5 60.4 45.3 36.5 29.4 23.7 20.5 16.9 14.3 12.1 10.2 8.66 operating frequency tradeoffs selection of the operating frequency is a tradeoff between ef? ciency, component size, minimum dropout voltage, and maximum input voltage. the advantage of high frequency operation is that smaller inductor and capacitor values may be used. the disadvantages are lower ef? ciency, lower maximum input voltage, and higher dropout voltage. the highest acceptable switching frequency (f sw(max) ) for a given application can be calculated as follows: f vv tvvv sw max d out on min dinsw () () = + + () ? where v in is the typical input voltage, v out is the output voltage, is the catch diode drop (~0.5v), v sw is the internal switch drop (~0.5v at max load). this equation shows that slower switching frequency is necessary to safely accommodate high v in /v out ratio. also, as shown in the next section, lower frequency allows a lower dropout voltage. the reason input voltage range depends on the switching frequency is because the lt1938 switch has ? nite minimum on and off times. the switch can turn on for a minimum of ~150ns and turn off for a minimum of ~150ns. this means that the minimum and maximum duty cycles are: dc f t dc f t min sw on min max sw off min = = () () 1? where f sw is the switching frequency, the t on(min) is the minimum switch on time (~150ns), and the t off(min) is the minimum switch off time (~150ns). these equations show that duty cycle range increases when switching frequency is decreased. a good choice of switching frequency should allow ad- equate input voltage range (see next section) and keep the inductor and capacitor values small. input voltage range the maximum input voltage for lt1938 applications de- pends on switching frequency, the absolute maximum rat- ings on v in and boost pins, and on operating mode. if the output is in start-up or short-circuit operating modes, then v in must be below 25v and below the result of the following equation: v vv ft vv in max out d sw on min dsw () () = + + ? where v in(max) is the maximum operating input voltage, v out is the output voltage, v d is the catch diode drop (~0.5v), v sw is the internal switch drop (~0.5v at max load), f sw is the switching frequency (set by r t ), and t on(min) is the minimum switch on time (~150ns). note that a higher switching frequency will depress the maximum operating input voltage. conversely, a lower switching figure 1. switching frequency vs r t value applications information
lt1938 11 1938f frequency will be necessary to achieve safe operation at high input voltages. if the output is in regulation and no short-circuit or start-up events are expected, then input voltage transients of up to 25v are acceptable regardless of the switching frequency. in this mode, the lt1938 may enter pulse skipping opera- tion where some switching pulses are skipped to maintain output regulation. in this mode the output voltage ripple and inductor current ripple will be higher than in normal operation. the minimum input voltage is determined by either the lt1938s minimum operating voltage of ~3.6v or by its maximum duty cycle (see equation in previous section). the minimum input voltage due to duty cycle is: v vv ft vv in min out d sw off min dsw () () = + + 1? ? where v in(min) is the minimum input voltage, and t off(min) is the minimum switch off time (150ns). note that higher switching frequency will increase the minimum input voltage. if a lower dropout voltage is desired, a lower switching frequency should be used. inductor selection for a given input and output voltage, the inductor value and switching frequency will determine the ripple current. the ripple current i l increases with higher v in or v out and decreases with higher inductance and faster switch- ing frequency. a reasonable starting point for selecting the ripple current is: i l = 0.4(i out(max) ) where i out(max) is the maximum output load current. to guarantee suf? cient output current, peak inductor current must be lower than the lt1938s switch current limit (i lim ). the peak inductor current is: i l(peak) = i out(max) + i l /2 where i l(peak) is the peak inductor current, i out(max) is the maximum output load current, and i l is the inductor ripple current. the lt1938s switch current limit (i lim ) is at least 3.5a at low duty cycles and decreases linearly to 2.5a at dc = 0.8. the maximum output current is a func- tion of the inductor ripple current: i out(max) = i lim C i l /2 be sure to pick an inductor ripple current that provides suf? cient maximum output current (i out(max) ). the largest inductor ripple current occurs at the highest v in . to guarantee that the ripple current stays below the speci? ed maximum, the inductor value should be chosen according to the following equation: l vv fi vv v out d l out d in max = +       +        ()  1?   where v d is the voltage drop of the catch diode (~0.4v), v in(max) is the maximum input voltage, v out is the output voltage, f sw is the switching frequency (set by r t ), and l is in the inductor value. the inductors rms current rating must be greater than the maximum load current and its saturation current should be about 30% higher. for robust operation in fault conditions (start-up or short circuit) and high input voltage (>30v), the saturation current should be above 3a. to keep the ef? ciency high, the series resistance (dcr) should be less than 0.1 , and the core material should be intended for high frequency applications. table 1 lists several vendors and suitable types. table 1. inductor vendors vendor url part series type murata www.murata.com lqh55d open tdk www.componenttdk.com slf7045 slf10145 shielded shielded toko www.toko.com d62cb d63cb d75c d75f shielded shielded shielded open sumida www.sumida.com cr54 cdrh74 cdrh6d38 cr75 open shielded shielded open applications information
lt1938 12 1938f of course, such a simple design guide will not always re- sult in the optimum inductor for your application. a larger value inductor provides a slightly higher maximum load current and will reduce the output voltage ripple. if your load is lower than 2a, then you can decrease the value of the inductor and operate with higher ripple current. this allows you to use a physically smaller inductor, or one with a lower dcr resulting in higher ef? ciency. there are several graphs in the typical performance characteristics section of this data sheet that show the maximum load current as a function of input voltage and inductor value for several popular output voltages. low inductance may result in discontinuous mode operation, which is okay but further reduces maximum load current. for details of maximum output current and discontinuous mode opera- tion, see linear technology application note 44. finally, for duty cycles greater than 50% (v out /v in > 0.5), there is a minimum inductance required to avoid subharmonic oscillations. see an19. input capacitor bypass the input of the lt1938 circuit with a ceramic capaci- tor of x7r or x5r type. y5v types have poor performance over temperature and applied voltage, and should not be used. a 4.7f to 10f ceramic capacitor is adequate to bypass the lt1938 and will easily handle the ripple current. note that larger input capacitance is required when a lower switching frequency is used. if the input power source has high impedance, or there is signi? cant inductance due to long wires or cables, additional bulk capacitance may be necessary. this can be provided with a low performance electrolytic capacitor. step-down regulators draw current from the input sup- ply in pulses with very fast rise and fall times. the input capacitor is required to reduce the resulting voltage ripple at the lt1938 and to force this very high frequency switching current into a tight local loop, minimizing emi. a 4.7f capacitor is capable of this task, but only if it is placed close to the lt1938 and the catch diode (see the pcb layout section). a second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the lt1938. a ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. if the lt1938 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the lt1938s voltage rating. this situation is easily avoided (see the hot plugging safety section). for space sensitive applications, a 2.2f ceramic capaci- tor can be used for local bypassing of the lt1938 input. however, the lower input capacitance will result in in- creased input current ripple and input voltage ripple, and may couple noise into other circuitry. also, the increased voltage ripple will raise the minimum operating voltage of the lt1938 to ~3.7v. output capacitor and output ripple the output capacitor has two essential functions. along with the inductor, it ? lters the square wave generated by the lt1938 to produce the dc output. in this role it determines the output ripple, and low impedance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the lt1938s control loop. ceramic capacitors have very low equivalent series resistance (esr) and provide the best ripple performance. a good starting value is: c vf out out sw = 100 where f sw is in mhz, and c out is the recommended output capacitance in f. use x5r or x7r types. this choice will provide low output ripple and good transient response. transient performance can be improved with a higher value capacitor if the compensation network is also adjusted to maintain the loop bandwidth. a lower value of output capacitor can be used to save space and cost but transient performance will suffer. see the fre- quency compensation section to choose an appropriate compensation network. applications information
lt1938 13 1938f when choosing a capacitor, look carefully through the data sheet to ? nd out what the actual capacitance is under operating conditions (applied voltage and temperature). a physically larger capacitor, or one with a higher voltage rating, may be required. high performance tantalum or electrolytic capacitors can be used for the output capacitor. low esr is important, so choose one that is intended for use in switching regulators. the esr should be speci? ed by the supplier, and should be 0.05 or less. such a capacitor will be larger than a ceramic capacitor and will have a larger capacitance, because the capacitor must be large to achieve low esr. table 2 lists several capacitor vendors. catch diode the catch diode conducts current only during switch off time. average forward current in normal operation can be calculated from: i d(avg) = i out (v in C v out )/v in where i out is the output load current. the only reason to consider a diode with a larger current rating than necessary for nominal operation is for the worst-case condition of shorted output. the diode current will then increase to the typical peak switch current. peak reverse voltage is equal to the regulator input voltage. use a diode with a reverse voltage rating greater than the input voltage. table 3 lists several schottky diodes and their manufacturers. table 3. diode vendors part number v r (v) i ave (a) v f at 1a (mv) v f at 2a (mv) on semiconductor mbrm120e 20 1 530 595 diodes inc. b120 b130 b220 b230 dfls230l 20 30 20 30 30 1 1 2 2 2 500 500 500 500 500 international recti? er 10bq030 20bq030 30 30 1 2 420 470 470 frequency compensation the lt1938 uses current mode control to regulate the output. this simpli? es loop compensation. in particular, the lt1938 does not require the esr of the output capacitor for stability, so you are free to use ceramic capacitors to achieve low output ripple and small circuit size. frequency compensation is provided by the components tied to the v c pin, as shown in figure 2. generally a capacitor (c c ) and a resistor (r c ) in series to ground are used. in addi- tion, there may be lower value capacitor in parallel. this capacitor (c f ) is not part of the loop compensation but is used to ? lter noise at the switching frequency, and is required only if a phase-lead capacitor is used or if the output capacitor has high esr. vendor phone url part series commands panasonic (714) 373-7366 www.panasonic.com ceramic, polymer, tantalum eef series kemet (864) 963-6300 www.kemet.com ceramic, tantalum t494, t495 sanyo (408) 749-9714 www.sanyovideo.com ceramic, polymer, tantalum poscap murata (408) 436-1300 www.murata.com ceramic avx www.avxcorp.com ceramic, tantalum tps series taiyo yuden (864) 963-6300 www.taiyo-yuden.com ceramic table 2. capacitor vendors applications information
lt1938 14 1938f loop compensation determines the stability and transient performance. designing the compensation network is a bit complicated and the best values depend on the ap- plication and in particular the type of output capacitor. a practical approach is to start with one of the circuits in this data sheet that is similar to your application and tune the compensation network to optimize the performance. stability should then be checked across all operating conditions, including load current, input voltage and temperature. the lt1375 data sheet contains a more thorough discussion of loop compensation and describes how to test the stability using a transient load. figure 2 shows an equivalent circuit for the lt1938 control loop. the error ampli? er is a transconductance ampli? er with ? nite output impedance. the power section, consisting of the modulator, power switch and inductor, is modeled as a transconductance ampli? er generating an output cur- rent proportional to the voltage at the v c pin. note that the output capacitor integrates this current, and that the capacitor on the v c pin (c c ) integrates the error ampli- ? er output current, resulting in two poles in the loop. in most cases a zero is required and comes from either the output capacitor esr or from a resistor r c in series with c c . this simple model works well as long as the value of the inductor is not too high and the loop crossover frequency is much lower than the switching frequency. a phase lead capacitor (c pl ) across the feedback divider figure 3. transient load response of the lt1938 front page application as the load current is stepped from 500ma to 1500ma. v out = 3.3v figure 2. model for loop response applications information ? + 1.265v sw v c gnd 3m lt1938 1938 f02 r1 output esr c f c c r c error amplifier fb r2 c1 c1 current mode power stage g m = 3.5mho g m = 330 mho + polymer or tantalum ceramic c pl may improve the transient response. figure 3 shows the transient response when the load current is stepped from 500ma to 1500ma and back to 500ma. boost and bias pin considerations capacitor c3 and the internal boost schottky diode (see the block diagram) are used to generate a boost volt- age that is higher than the input voltage. in most cases a 0.22f capacitor will work well. figure 2 shows three ways to arrange the boost circuit. the boost pin must be more than 2.3v above the sw pin for best ef? ciency. for outputs of 3v and above, the standard circuit (figure 4a) is best. for outputs between 2.8v and 3v, use a 1f boost capacitor. a 2.5v output presents a special case because it is marginally adequate to support the boosted drive stage while using the internal boost diode. for reliable boost pin operation with 2.5v outputs use a good external schottky diode (such as the on semi mbr0540), and a 1f boost capacitor (see figure 4b). for lower output voltages the boost diode can be tied to the input (figure 4c), or to another supply greater than 2.8v. the circuit in figure 4a is more ef? cient because the boost pin current and bias pin quiescent current comes from a lower voltage source. you must also be sure that the maximum voltage ratings of the boost and bias pins are not exceeded. the minimum operating voltage of an lt1938 application is limited by the minimum input voltage (3.6v) and by the maximum duty cycle as outlined in a previous section. for 1938 f03 i l 1a/div v out 100mv/div 10 s/div v out = 12v, front page application
lt1938 15 1938f proper start-up, the minimum input voltage is also limited by the boost circuit. if the input voltage is ramped slowly, or the lt1938 is turned on with its run/ss pin when the output is already in regulation, then the boost capacitor may not be fully charged. because the boost capacitor is charged with the energy stored in the inductor, the circuit will rely on some minimum load current to get the boost circuit running properly. this minimum load will depend on input and output voltages, and on the arrangement of the boost circuit. the minimum load generally goes to zero once the circuit has started. figure 5 shows a plot of minimum load to start and to run as a function of input voltage. in many cases the discharged output capacitor will present a load to the switcher and the minimum input to start will be the same as the minimum input to run. this occurs, for example, if run/ss is asserted after v in is applied. the plots show the worst-case situation where v in is ramping very slowly. for lower start-up voltage, the boost diode can be tied to v in ; however, this restricts the input range to one-half of the absolute maximum rating of the boost pin. at light loads, the inductor current becomes discontinu- ous and the effective duty cycle can be very high. this reduces the minimum input voltage to approximately 300mv above v out . at higher load currents, the inductor current is continuous and the duty cycle is limited by the maximum duty cycle of the lt1938, requiring a higher input voltage to maintain regulation. figure 4. three circuits for generating the boost voltage figure 5. the minimum input voltage depends on output voltage, load current and boost circuit applications information v in boost sw bd v in v out 4.7 f c3 gnd lt1938 v in boost sw bd v in v out 4.7 f c3 d2 gnd lt1938 v in boost sw bd v in v out 4.7 f c3 gnd lt1938 1938 f04 (4a) for v out > 2.8v (4b) for 2.5v < v out < 2.8v (4c) for v out < 2.5v 1938 f05 load current (a) 0.001 input voltage (v) 4.0 4.5 5.0 10 3.5 3.0 2.0 0.01 0.1 1 2.5 6.0 5.5 to start to run v out = 3.3v t a = 25 c l = 4.7 h f = 800khz load current (a) 0.001 input voltage (v) 5.0 6.0 7.0 10 4.0 2.0 0.01 0.1 1 3.0 8.0 to start to run v out = 5v t a = 25 c l = 4.7 h f = 800khz
lt1938 16 1938f soft-start the run/ss pin can be used to soft-start the lt1938, reducing the maximum input current during start-up. the run/ss pin is driven through an external rc ? lter to create a voltage ramp at this pin. figure 7 shows the start- up and shut-down waveforms with the soft-start circuit. by choosing a large rc time constant, the peak start-up current can be reduced to the current that is required to regulate the output, with no overshoot. choose the value of the resistor so that it can supply 20a when the run/ss pin reaches 2.3v. lt1938 can pull large currents from the output through the sw pin and the v in pin. figure 7 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. figure 8 shows the recommended component placement with trace, ground plane and via locations. note that large, switched currents ? ow in the lt1938s v in and sw pins, the catch diode (d1) and the input capacitor (c1). the loop formed by these components should be as small as possible. these components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local, unbroken ground plane below these components. the sw and boost nodes should be as small as possible. finally, keep the fb and v c nodes small so that the ground traces will shield them from the sw and boost nodes. the exposed pad on the bottom of the package must be soldered to ground so that the pad acts as a heat sink. to keep thermal resistance low, extend the ground plane as much as possible, and add thermal vias under and near the lt1938 to additional ground planes within the circuit board and on the bottom side. figure 6. to soft-start the lt1938, add a resisitor and capacitor to the run/ss pin applications information 1938 f06 i l 1a/div v run/ss 2v/div v out 2v/div run/ss gnd 0.22 f run 15k 2ms/div shorted and reversed input protection if the inductor is chosen so that it wont saturate exces- sively, an lt1938 buck regulator will tolerate a shorted output. there is another situation to consider in systems where the output will be held high when the input to the lt1938 is absent. this may occur in battery charging ap- plications or in battery backup systems where a battery or some other supply is diode or-ed with the lt1938s output. if the v in pin is allowed to ? oat and the run/ss pin is held high (either by a logic signal or because it is tied to v in ), then the lt1938s internal circuitry will pull its quiescent current through its sw pin. this is ? ne if your system can tolerate a few ma in this state. if you ground the run/ss pin, the sw pin current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the figure 7. diode d4 prevents a shorted input from discharging a backup battery tied to the output. it also protects the circuit from a reversed input. the lt1938 runs only when the input is present v in boost gnd fb run/ss v c sw d4 mbrs140 v in lt1938 1938 f07 v out backup
lt1938 17 1938f hot plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of lt1938 circuits. however, these capaci- tors can cause problems if the lt1938 is plugged into a live supply (see linear technology application note 88 for a complete discussion). the low loss ceramic capacitor, combined with stray inductance in series with the power source, forms an under damped tank circuit, and the voltage at the v in pin of the lt1938 can ring to twice the nominal input voltage, possibly exceeding the lt1938s rating and damaging the part. if the input supply is poorly controlled or the user will be plugging the lt1938 into an energized supply, the input network should be designed to prevent this overshoot. figure 9 shows the waveforms that result when an lt1938 circuit is connected to a 24v supply through six feet of 24-gauge twisted pair. the ? rst plot is the response with a 4.7f ceramic capacitor at the input. the input voltage rings as high as 50v and the input current peaks at 26a. a good solution is shown in figure 9b. a 0.7 resistor is added in series with the applications information figure 8. a good pcb layout ensures proper, low emi operation vias to local ground plane vias to v out vias to run/ss vias to pg vias to v in outline of local ground plane 1938 f08 l1 c2 r rt r pg r c r2 r1 c c v out d1 c1 gnd input to eliminate the voltage overshoot (it also reduces the peak input current). a 0.1f capacitor improves high frequency ? ltering. for high input voltages its impact on ef? ciency is minor, reducing ef? ciency by 1.5 percent for a 5v output at full load operating from 24v. high temperature considerations the pcb must provide heat sinking to keep the lt1938 cool. the exposed pad on the bottom of the package must be soldered to a ground plane. this ground should be tied to large copper layers below with thermal vias; these lay- ers will spread the heat dissipated by the lt1938. place additional vias can reduce thermal resistance further. with these steps, the thermal resistance from die (or junction) to ambient can be reduced to ja = 35c/w or less. with 100 lfpm air? ow, this resistance can fall by another 25%. further increases in air? ow will lead to lower thermal re- sistance. because of the large output current capability of the lt1938, it is possible to dissipate enough heat to raise the junction temperature beyond the absolute maximum of 125c. when operating at high ambient temperatures, the
lt1938 18 1938f maximum load current should be derated as the ambient temperature approaches 125c. power dissipation within the lt1938 can be estimated by calculating the total power loss from an ef? ciency measure- ment and subtracting the catch diode loss and inductor loss. the die temperature is calculated by multiplying the lt1938 power dissipation by the thermal resistance from junction to ambient. figure 9. a well chosen input network prevents input voltage overshoot and ensures reliable operation when the lt1938 is connected to a live supply applications information + lt1938 4.7 f v in 20v/div i in 10a/div 20 s/div v in closing switch simulates hot plug i in (9a) (9b) low impedance energized 24v supply stray inductance due to 6 feet (2 meters) of twisted pair + lt1938 4.7 f 0.1 f 0.7 v in 20v/div i in 10a/div 20 s/div danger ringing v in may exceed absolute maximum rating (9c) + lt1938 4.7 f 22 f 35v ai.ei. 1938 f09 v in 20v/div i in 10a/div 20 s/div + other linear technology publications application notes 19, 35 and 44 contain more detailed descriptions and design information for buck regulators and other switching regulators. the lt1376 data sheet has a more extensive discussion of output ripple, loop compensation and stability testing. design note 100 shows how to generate a bipolar output supply using a buck regulator.
lt1938 19 1938f typical applications 5v step-down converter 3.3v step-down converter sw bias fb v c pg rt v in bd v in 6.3v to 25v v out 5v 2.2a 4.7 f 0.47 f 22 f 200k f = 800khz d: diodes inc. dfls230l l: taiyo yuden np06dzb6r8m d 20k 60.4k l 6.8 h 590k gnd 680pf on off lt1938 1938 ta02 run/ss boost sw bias fb v c pg rt v in bd v in 4.4v to 25v v out 3.3v 2.2a 4.7 f 0.47 f 22 f 200k f = 800khz d: diodes inc. dfls230l l: taiyo yuden np06dzb4r7m d 16.2k 60.4k l 4.7 h 324k gnd 680pf on off lt1938 1938 ta03 run/ss boost
lt1938 20 1938f typical applications 2.5v step-down converter 5v, 2mhz step-down converter sw bias fb v c pg rt v in bd v in 4v to 25v v out 2.5v 2.2a 4.7 f 1 f 47 f 200k f = 600khz d1: diodes inc. dfls230l d2: mbr0540 l: taiyo yuden np06dzb4r7m d1 22.1k 84.5k l 4.7 h 196k gnd 680pf on off lt1938 d2 3684 ta04 run/ss boost sw bias fb v c pg rt v in bd v in 8.6v to 22v v out 5v 2a 2.2 f 0.47 f 10 f 200k f = 2mhz d: diodes inc. dfls230l l: sumida cdrh4d22/hp-2r2 d 20k 16.9k l 2.2 h 590k gnd 680pf on off lt1938 1938 ta05 run/ss boost
lt1938 21 1938f typical applications 12v step-down converter sw bias fb v c pg rt v in bd v in 15v to 25v v out 12v 2.2a 10 f 0.47 f 22 f 100k f = 800khz d: diodes inc. dfls230l l: nec/tokin plc-0755-100 d 30k 60.4k l 10 h 845k gnd 680pf on off lt1938 3684 ta06 run/ss boost
lt1938 22 1938f typical applications 1.8v step-down converter sw bias fb v c pg rt v in bd v in 3.5v to 25v v out 1.8v 2.2a 4.7 f 0.47 f 47 f 200k f = 500khz d: diodes inc. dfls230l l: taiyo yuden np06dzb3r3m d 15.4k 105k l 3.3 h 84.5k gnd 680pf on off lt1938 1938 ta07 run/ss boost
lt1938 23 1938f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699) package description 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.38 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dd) dfn 1103 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.675 0.05 3.50 0.05 package outline 0.25 0.05 0.50 bsc
lt1938 24 1938f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 1007 ? printed in usa part number description comments lt1933 500ma (i out ), 500khz step-down switching regulator in sot-23 v in : 3.6v to 36v, v out(min) = 12v, i q = 1.6ma, i sd < 1a, thinsot tm package lt3437 60v, 400ma (i out ), micropower step-down dc/dc converter with burst mode operation v in : 3.3v to 80v, v out(min) = 1.25v, i q = 100a, i sd < 1a, dfn package lt1936 36v, 1.4a (i out ), 500khz high ef? ciency step-down dc/dc converter v in : 3.6v to 36v, v out(min) = 1.2v, i q = 1.9ma, i sd < 1a, ms8e package lt3493 36v, 1.2a (i out ), 750khz high ef? ciency step-down dc/dc converter v in : 3.6v to 40v, v out(min) = 0.8v, i q = 1.9ma, i sd < 1a, dfn package lt1976/lt1977 60v, 1.2a (i out ), 200khz/500khz, high ef? ciency step- down dc/dc converter with burst mode operation v in : 3.3v to 60v, v out(min) = 1.20v, i q = 100a, i sd < 1a, tssop16e package lt1767 25v, 1.2a (i out ), 1.1mhz, high ef? ciency step-down dc/dc converter v in : 3v to 25v, v out(min) = 1.20v, i q = 1ma, i sd < 6a, ms8e package lt1940 dual 25v, 1.4a (i out ), 1.1mhz, high ef? ciency step-down dc/dc converter v in : 3.6v to 25v, v out(min) = 1.20v, i q = 3.8ma, i sd < 30a, tssop16e package lt1766 60v, 1.2a (i out ), 200khz, high ef? ciency step-down dc/dc converter v in : 5.5v to 60v, v out(min) = 1.20v, i q = 2.5ma, i sd < 25a, tssop16e package lt3434/lt3435 60v, 2.4a (i out ), 200/500khz, high ef? ciency step-down dc/dc converter with burst mode operation v in : 3.3v to 60v, v out(min) = 1.20v, i q = 100a, i sd < 1a, tssop16e package lt3481 36v, 2a (i out ), micropower 2.8mhz, high ef? ciency step-down dc/dc converter v in : 3.6v to 36v, v out(min) = 1.265v, i q = 5a, i sd < 1a, 3mm 3mm dfn and ms10e packages 1.265v step-down converter sw bias fb v c pg rt v in bd v in 3.6v to 25v v out 1.265v 2.2a 4.7 f 0.47 f 47 f f = 500khz d: diodes inc. dfls240l l: taiyo yuden np06dzb3r3m d 13k 105k l 3.3 h gnd 680pf on off lt1938 1938 ta08 run/ss boost typical application related parts


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